Programmable delay lines are required for the generation of accurately shaped waveforms, and for delaying electronic signals. These waveforms are used in automated test systems (ATEs), to measure time intervals and to sample data at circuit interfaces. Specific applications require varying degrees of accuracy and resolution in the delay of the electronic signal.
ATEs can require delay lines with a delay resolution of 10 to 20 picoseconds. Data sampling of circuit interfaces may, for example, only require delay lines with delay resolutions of 100 to 200 picoseconds for systems operating at 100 MHZ. Strobe signals in high speed interfaces require delay lines in which the delay remains constant even though the delay line may be fabricated using varying processes and the delay line is subjected to varying temperatures and supply voltages.
Programmable delay lines have been designed using random access memory (RAM), coupled oscillators, shift registers, charge coupled devices (CCDs), ramp comparators, multiplexed delay lines and tapped delay lines. Each of these types of delay line designs suffer limitations. These limitation include the resolution of the delay of the delay line being too coarse, or the delay of the delay line being inconsistent. Delay inconsistencies can be due to variations in the process used to fabrication the delay line, or variations in the delay of the delay line due to variations in the temperature or voltage supply of the delay line.
Delay line inconsistencies can also occur due to the design of the delay line being in-tolerant to modeling errors that occur when designing the delay line. That is, when a delay line is being designed, the delay line is modeled. All delay line models include inaccuracies of one type or another. The inaccuracies in the models can cause the delay of the designed delay line to be inconsistent or unpredictable.
It is desirable to have a programmable delay line which offers high resolution. Furthermore, the delay of the programmable delay line should not vary depending on the process used to fabricate the delay line, or because the temperature or supply voltage of the delay line is variable. The programmable delay line should offer consistent performance even if the models used to design the delay line are inaccurate.